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VFD Driver/Controller IC
PT6312
DESCRIPTION
PT6312 is a Vacuum Fluorescent Display (VFD) Controller driven on a 1/4 to 1/11 duty factor. Eleven segment output lines, 6 grid output lines, 5 segment/grid output drive lines, one display memory, control circuit, key scan circuit are all incorporated into a single chip to build a highly reliable peripheral device for a single chip micro computer. Serial data is fed to PT6312 via a three-line serial interface. It is housed in a 44-pin plastic LQFP Package and is functionally compatible with pD16312.
FEATURES
* * * * * * * * * * * CMOS technology Low power consumption Key scanning (6 x 4 matrix) Multiple display modes: (11 segments, 11 digits to 16 segments, 6 digits) 8-Step dimming circuitry LED ports provided (4 channels, 20mA max.) 4- Bits general purpose input ports provided Serial interface for Clock, Data Input, Data Output, Strobe pins No external resistors needed for driver outputs Functional compatibility with pD16312 Available in 44-pin, LQFP package
APPLICATION
* Microcomputer peripheral devices
PT6312 V2.6
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VFD Driver/Controller IC
PT6312
BLOCK DIAGRAM
S G 1 /K S 1 S G 2 /K S 2 S G 3 /K S 3 S G 4 /K S 4 S G 5 /K S 5 S G 6 /K S 6 SG7 SG8 SG9 SG10 S G 11 S G 1 2 /G R11 S W1 S W2 S W3 S W4 S G 1 3 /G R1 0 G e n e r al In p u t R e gi st er Ke y Ma tr i x M e mo r y S G 1 4 /G R9 S G 1 5 /G R8 S G 1 6 /G R7
Co n tr o l DI N DO U T CL K S TB V DD R OSC OSC Ti mi n g G en e r a to r S e r i al D at a In t er fa ce
Di sp l a y Me m o ry (1 6 b i ts x 11 Wo r d s) S e g me n t D r ive r / G r i d D r iv er / K e y S c an O u tp u t
L E D1 L E D2 L E D3 L E D4
LED Dr i ve r G r id D ri ve r Di m mi n g Ci rc ui t
G R1 G R2 G R3 G R4 G R5 G R6
K1 K2 K3 K4
V DD
G ND
VEE
PT6312 V2.6
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VFD Driver/Controller IC
PT6312
PIN CONFIGURATION
42 LED1 41 LED2 40 LED3 39 LED4 43 GND 44 OSC 38 VDD 37 GR1 36 GR2 35 GR3 34 GR4
SW1 SW2 SW3 SW4 DOUT DIN G ND CLK STB
1 2 3 4 5 6 7 8 9
33 GR5 32 GR6 31 SG16/GR7 30 SG15/GR8 29 SG14/GR9
PT6312
28 SG13/GR10 27 VEE 26 SG12/GR11 25 SG11 24 SG10 23 SG9
K1 10 K2 11
VDD 14
SG2/KS2 16
SG3/KS3 17
SG4/KS4 18
SG5/KS5 19
SG6/KS6 20
SG7 21
K3 12
K4 13
PT6312 V2.6
SG1/KS1 15
-3-
SG8 22
December, 2005
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VFD Driver/Controller IC
PT6312
PIN DESCRIPTION
Pin Name SW1 to SW4 DOUT DIN GND CLK I/O Description I General purpose input pins Data output pin (N-Channel, Open-drain) O This pin outputs serial data at the falling edge of the shift clock (starting from the lower bit). Data input pin I This pin inputs serial data at the rising edge of the shift clock (starting from the lower bit). - Ground pin Clock input pin I This pin reads serial data at the rising edge and outputs data at the falling edge. Serial interface strobe pin The data input after the STB has fallen is I processed as a command. When this in is "HIGH", CLK is ignored. Key data input pins I The data inputted to these pins is latched at the end of the display cycle. - Logic power supply High-voltage segment output pins O Also acts as the key source. O High-voltage segment output pins O O O I High-voltage segment/grid output pins Pull-down level High-voltage grid output pins LED output pin Oscillator input pin A resistor is connected to this pin to determine the oscillation frequency. Pin No. 1 to 4 5 6 7, 43 8
STB
9
K1 to K4 VDD SG1/KS1 to SG6/KS6 SG7 to SG11 SG12/GR11 SG13/GR10 to SG16/GR7 VEE GR6 to GR1 LED1 to LED4 OSC
10 to 13 14, 38 15 to 20 21 to 25 26 28 to 31 27 32 to 37 42 to 39 44
PT6312 V2.6
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VFD Driver/Controller IC
PT6312
FUNCTION DESCRIPTION
COMMANDS
Commands determine the display mode and status of PT6312. A command is the first byte (b0 to b7) inputted to PT6312 via the DIN Pin after STB Pin has changed from "HIGH" to "LOW" State. If for some reason the STB Pin is set to "HIGH" while data or commands are being transmitted, the serial communication is initialized, and the data/commands being transmitted are considered invalid.
COMMAND 1: DISPLAY MODE SETTING COMMANDS
PT6312 provides 8 display mode settings as shown in the diagram below: As stated earlier a command is the first one byte (b0 to b7) transmitted to PT6312 via the DIN Pin when STB is "LOW". However, for these commands, the bits 4 to 6 (b3 to b5) are ignored, bits 7 & 8 (b6 to b7) are given a value of "0". The Display Mode Setting Commands determine the number of segments and grids to be used (1/4 to 1/11 duty, 11 to 16 segments). When these commands are executed, the display is forcibly turned off, the key scanning stops. A display "ON" command must be executed in order to resume display. If the same mode setting is selected, no command execution is take place, therefore, nothing happens. When Power is turned "ON", the 11-digit, 11-segment modes is selected. MSB 0 0 LSB b2 b1 b0 Display mode settings: 000: 4 digits, 16 segments 001: 5 digits, 16 segments 010: 6 digits, 16 segments 011: 7 digits, 15 segments 100: 8 digits, 14 segments 101: 9 digits, 13 segments 110: 10 digits, 12 segments 111: 11 digits, 11 segments
Not relevant
PT6312 V2.6
-5-
December, 2005
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VFD Driver/Controller IC
PT6312
Display Mode and RAM Address Data transmitted from an external device to PT6312 via the serial interface are stored in the Display RAM and are assigned addresses. The RAM Addresses of PT6312 are given below in 8 bits unit. SG1 SG4 00HL 02HL 04HL 06HL 08HL 0AHL 1CHL 1EHL 10HL 12HL 14HL b0 xxHL Lower 4 bits b3 b4 xxHU Higher 4 bits b7 SG5 SG8 00HU 02HU 04HU 06HU 08HU 0AHU 1CHU 1EHU 10HU 12HU 14HU SG9 SG12 01HL 03HL 05HL 07HL 09HL 1BHL 0DHL 1FHL 11HL 13HL 15HL SG13 SG16 01HU 03HU 05HU 07HU 09HU 1BHU 0DHU 1FHU 11HU 13HU 15HU DIG1 DIG2 DIG3 DIG4 DIG5 DIG6 DIG7 DIG8 DIG9 DIG10 DIG11
PT6312 V2.6
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VFD Driver/Controller IC COMMAND 2: DATA SETTING COMMANDS
PT6312
The Data Setting Commands executes the Data Write or Data Read Modes for PT6312. The data Setting Command, the bits 5 and 6 (b4, b5) are ignored, bit 7 (b6) is given the value of "1" while bit 8 (b7) is given the value of "0". Please refer to the diagram below. When power is turned ON, the bit 4 to bit 1 (b3 to b0) are given the value of "0". MSB 0 1 LSB b3 b2 b1 b0 Data write & read mode settings: 00: Write data to display mode 01: Write data to LED port 10: Read Key data 11: Read SW data Address increment mode settings (Display mode) 0: Increment address after data has been written 1: Fixed address Mode settings: 0: Normal operation mode 1: Test mode
Not relevant
PT6312 V2.6
-7-
December, 2005
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VFD Driver/Controller IC
PT6312 Key Matrix & Key Input Data Storage RAM PT6312 Key Matrix consists of 6 x 4 array as shown below:
PT6312
K1 K2 K3
K4
SG1/KS1
SG2/KS2
SG3/KS3
SG4/KS4
Each data inputted by each key are stored as follows. They are read by a READ Command, starting from the last significant bit. When the most significant bit of the data (SG6 b7) has been read, the least significant bit of the next data (SG1 b0) is read. K1.....................K4 SG1/KS1 SG3/KS3 SG5/KS5 b0......................b3 K1.....................K4 SG2/KS2 SG4/KS4 SG6/KS6 b4......................b7
SG5/KS5
Reading Sequence
PT6312 V2.6
-8-
SG6/KS6
December, 2005
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VFD Driver/Controller IC
PT6312
LED Display PT6312 provides 4 LED Display Terminals, namely LED1 to LED4. Data is written to the LED Port starting from the least significant bit (b0) of the port using a WRITE Command. Each bit starting from the least significant (b0) activates a specific LED Display Terminal -- b0 corresponds LED1 Display, b1 activates LED2 and so forth. Since there are only 4 LED display terminals, bits 5 to 8 (b4 ~ b7) are not used and therefore ignored. This means that b4 to b7 does NOT in anyway activate any LED Display, they are totally ignored.
When a bit (b0 ~ b3) in the LED Port is "0", the corresponding LED is ON. Conversely, when the bit is "1", the LED Display is turned OFF. For example, Bit 1 (as designated by b0) has the value of "0", then this means that LED1 is ON. It must be noted that when power is turned ON, bit 4 to bit 1 (b3 to b0) are given the value of "1". Please refer to the diagrams below. MSB LSB b3 b2 b1 b0 LED1 LED2 LED3 LED4
Not used
Switch Data PT6312 provides 4 Switch Inputs, namely SW1 to SW4. SW Data is read starting from the least significant bit (b0) using a READ Command. Each bit starting from the least significant (b0) correspond to a specific Switch Input -- b0 corresponds SW1, b1 to SW2 and so forth. Since there are only 4 Switch Inputs, Bits 5 to 8 (b4 to 7) are given the value of "0". Please refer to the diagram below.
MSB 0 0 0 0 LSB b3 b2 b1 b0 SW1 SW2 SW3 SW4
PT6312 V2.6
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VFD Driver/Controller IC COMMAND 3: ADDRESS SETTING COMMANDS
PT6312
Address Setting Commands are used to set the address of the display memory. The address is considered valid if it has a value of "00H" to "15H". If the address is set to 16H or higher, the data is ignored until a valid address is set. When power is turned ON, the address is set at "00H". Please refer to the diagram below. MSB 1 1 LSB b4 b3 b2 b1 b0 Address: 00H to 15H
Not relevant
COMMAND 4: DISPLAY CONTROL COMMANDS
The Display Control Commands are used to turn ON or OFF a display. It also used to set the pulse width. Please refer to the diagram below. When the power is turned ON, a 1/16 pulse width is selected and the displayed is turned OFF (the key scanning is stopped). MSB 1 0 LSB b3 b2 b1 b0 Dimming quantity settings: 000: Pulse width = 1/16 001: Pulse width = 2/16 010: Pulse width = 4/16 011: Pulse width = 10/16 100: Pulse width - 11/16 101: Pulse width = 12/16 110: Pulse width = 13/16 111: Pulse width = 14/16 Display settings: 0: Display off (Key scan continues) 1: Display on
Not relevant
PT6312 V2.6
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December, 2005
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VFD Driver/Controller IC
PT6312
SCANNING AND DISPLAY TIMING
The Key Scanning and display timing diagram is given below. One cycle of key scanning consists of 1 frame. The data of the 6 x 4 matrix is stored in the RAM.
T DI SP L AY= 500 s Key S can D ata
SG Output G1 G2 G3
DIG1
DIG2
DIG3
DIGn
DIG1
Gn 1 F rame = T D IS P LAY x (n +1)
PT6312 V2.6
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VFD Driver/Controller IC
PT6312
SERIAL COMMUNICATION FORMAT
The following diagram shows the PT6312 serial communication format. The DOUT Pin is an N-channel, open-drain output pin, therefore, it is highly recommended that an external pull-up resistor (1 K to 10 K) must be connected to DOUT.
Rec eption ( Data/Co m ma nd Wr ite)
If data continues ST B
DIN
b0
b1
b2
b6
b7
CLK
1
2
3
7
8
Trans m is sio n (Data Read )
ST B DIN CLK DOUT Data Read Command is set b0 1 b1 2 b2 3 b3 4 b4 5 b5 6 b6 7 b7 8
t wa it
1 b0
2 b1
3 b2
4
5
6
b3
b4
b5
Data Reading Starts
where: twait (waiting time) 1s It must be noted that when the data is read, the waiting time (twait) between the rising of the eighth clock that has set the command and the falling of the first clock that has read the data is greater or equal to 1s.
PT6312 V2.6
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VFD Driver/Controller IC
PT6312
SWITCHING CHARACTERISTIC WAVEFORM
PT6312 Switching Characteristics Waveform is given below.
fosc OSC
50 %
PW ST B ST B PW CL K CLK tsetup DIN tPZL DOUT tTHZ Sn/Gn
90 % 10 %
PW CL K
tCL K- ST B
thold
tPLZ
tTZH
where: PW CLK (Clock Pulse Width) 400ns t setup (Data Setup Time) 100ns tCLK-STB (Clock - Strobe Time) 1s tTZH (Grid Rise Time) 0.5s tTZH (Segment Rise Time) 2s fosc = Oscillation Frequency
PW STB (Strobe Pulse Width) 1s thold (Data Hold Time) 100ns tTHZ (Fall Time) 120s tPZL (Propagation Delay Time) 100ns tPLZ (Propagation Delay Time) 300ns
PT6312 V2.6
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VFD Driver/Controller IC
PT6312
APPLICATIONS
Display memory is updated by incrementing addresses. Please refer to the following diagram.
ST B CLK DIN
Co mm and 2 Co mm and 3 Da ta 1 Da ta n Co mm and 1 Co mm and 4
where: Command 1: Display mode setting command Command 2: Data setting command Command 3: Address setting command Data 1 to n: Transfer display data (2 bytes max.) Command 4: Display control command The following diagram shows the waveforms when updating specific addresses.
ST B CLK DIN
Co mm and 2 Co mm and 3 Da ta Co mm and 3 Da ta
where: Command 2: Data setting command Command 3: Address setting command Data: Display data
PT6312 V2.6
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VFD Driver/Controller IC
PT6312
RECOMMENDED SOFTWARE FLOWCHART
START Delay 200ms
SET COMMAND 2 (Write Data)
SET COMMAND 3 Clear Display RAM (See Note 5)
INITIAL SETTING
SET COMMAND 1
SET COMMAND 4 (88H ~ 8FH: Display ON)
MAIN PROGRAM
SET COMMAND 2 (READ KEY & WRITE DATA INCLUDED) MAIN LOOP SET COMMAND 3
SET COMMAND 1
SET COMMAND 4
END
Notes: 1. Command 1: Display Mode Commands 2. Command 2: Data Setting Commands 3. Command 3: Address Setting Commands 4. Command 4: Display Control Commands 5. When IC power is applied for the first time, the contents of the Display RAM is not defined; thus, it is strongly suggested that the contents of the Display RAM be cleared during the initial setting.
PT6312 V2.6 - 15 December, 2005
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VFD Driver/Controller IC
PT6312
ABSOLUTE MAXIMUM RATINGS
(Unless otherwise stated, Ta=25, GND=0V) Parameter Symbol Logic supply voltage VDD Driver supply voltage VEE Logic input voltage V1 VFD driver output voltage V0 LED driver output current IOLED VFD driver output current Operating temperature Storage temperature IVOFD Topr Tstg
Ratings -0.5 to +7 VDD +0.5 to VDD -40 -0.5 to VDD +0.5 VEE -0.5 to VDD +0.5 +25 -40 (Grid) -15 (Segment) -40 to +85 -65 to +150
Unit V V V V mA
mA

RECOMMENDED OPERATING RANGE
(Unless otherwise stated, Ta=-40 to +85, GND=0V)
Parameter
Logic supply voltage High-level input voltage Low-level input voltage Driver supply voltage
Symbol
VDD VIH VIL VEE
Min. 3.0 0.7VDD 0 VDD -35
Ratings Typ. 5 -
Max. 5.5 VDD 0.3VDD 0
Unit
V V V V
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VFD Driver/Controller IC
PT6312
ELECTRICAL CHARACTERISTICS
(Unless otherwise stated, VDD=5V, GND=0V, VEE=VDD-35V, Ta=25) Parameter Symbol Test Condition Min. Typ. Max. Unit IOHLED=-1mA 0.9VDD V High-level output voltage VOHLED LED1 to LED4 IOLLED=+20mA 1 V Low-level output voltage VOLLED LED1 to LED4 Low-level output voltage VOLDOUT DOUT, IOLDOUT=4mA 0.4 V VO=VDD -2V -3 mA High-level output current IOHSG SG1 to SG11 VO=VDD -2V High-level output current IOHGR GR1 to GR6, -15 mA SG12/GR11 to SG16/GR7 High-level input voltage VIH 0.7VDD V Low-level input voltage VIL 0.3VDD V Oscillation frequency fosc R=51K 350 500 650 KHz Input current II VI=VDD or VSS 1 A Dynamic current IDDdyn Under no load display off 5 mA consumption (Unless otherwise stated, VDD=3.3V, GND=0V, VEE=VDD-35 V, Ta=25) Parameter Symbol Test Condition Min. Typ. Max. Unit IOHLED=-1mA 0.9VDD V High-level output voltage VOHLED LED1 to LED4 IOLLED=+20mA 1 V Low-level output voltage VOLLED LED1 to LED4 Low-level output voltage VOLDOUT DOUT, IOLDOUT=4mA 0.4 V VO=VDD -2V -1.5 mA High-level output current IOHSG SG1 to SG8 VO=VDD -2V High-level output current IOHGR GR1 to GR6, -6 mA SG9 to SG16/GR7 High-level input voltage VIH 0.7VDD V Low-level input voltage VIL 0.3VDD V Oscillation frequency fosc R=30K 350 500 650 KHz Input current II VI=VDD or VSS 1 A Dynamic current IDDdyn Under no load display off 3 mA consumption
PT6312 V2.6
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VFD Driver/Controller IC
PT6312
6-GRID X 6-SEGMENT VFD APPLICATION CIRCUIT
+5V/+3.3V
0.1F 220 220 220 220
G3 S12
G4
G2 S11
+5V/+3.3V 10K
38 44 39 37 43 36 35 42 41 40 34
G5
6-GRID x 16-SEGMENT VFD
G6
S16 S15 S14 S13 S10 S9 S8 S7 S6 S5
G1
51K/30K
1 2 3 4 5 6
33 32 31 30 29
PT6312
28 27 26 25 24 23 -24V
MCU
7 8 9 10
12 13 14 15 16 17 18 19 20 21 22
11
+5V/ +3.3V
10K
10K
10K
10K
IN4148 x 6
10K
10K
10K
10K
PT6312 V2.6
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December, 2005
S4
S3
S2
S1
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VFD Driver/Controller IC
PT6312
ORDER INFORMATION
Valid Part Number PT6312LQ Package Type 44-pin, LQFP Top Code PT6312LQ
PT6312 V2.6
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December, 2005
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VFD Driver/Controller IC
PT6312
PACKAGE INFORMATION
44 PINS LQFP (BODY SIZE: 10MM X 10MM; PITCH=0.80MM; THK BODY: 1.40MM)
D D1 -D-
-AE1 E
-B-
e
1
b
-C 2
SEATING PLANE
R1 -HR2 GAUGE PLANE
0.25mm
S
3
L
PT6312 V2.6
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December, 2005
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VFD Driver/Controller IC
Symbol A A1 A2 b b1 D D1 e E E1 1 2 3 C L L1 R1 R2 S Min. 0.05 1.35 0.30 0.30 Nom. 1.40 0.37 0.35 12.00 BASIC 10.00 BASIC 0.80 BASIC 12.00 BASIC 10.00 BASIC 3.5 12 12 0.60 1.00 REF Max 1.60 0.15 1.45 0.45 0.40
PT6312
0 0 11 11 0.09 0.45 0.08 0.08 0.20
7 13 13 0.20 0.75 0.20 -
Notes: 1. Controlling Dimensions are in millimeters . 2. Dimensioning and tolerancing per ASME Y14.5M-1994. 3. The top package body size may be smaller than the bottom package size by as much as 0.15mm. 4. Datums A-B and D to be determined at datum plane H. 5. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. D1 and E1 are maximum plastic body size dimensions including mold mismatch. 6. Details of pin1 identifier are optional but must be located within the zone indicated. 7. Dimension b does not include dambar protrusion. Allowable dambar protrusion shall not cause the lead to exceed the maximum b dimension by more than 0.08mm. Dambar cannot be located on the lower radius or the foot. Minimum space between protrusion and an adjacent lead is 0.07mm for 0.4mm and 0.5mm pitch packages. 8. A1 is defined as the distance from the seating plane to the lowest point on the package body. 9. Refer to JEDEC STD MS-026 Variation BCB JEDEC is the trademark of JEDEC SOLID STATE TECHNOLOGY ASSOCIATION
PT6312 V2.6
- 21 -
December, 2005

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